Serial transmitters allow for the transmission of data sequentially by bit, over a given channel. As fast data conversion is often a necessity, high speed serial transmitters must be implemented to achieve various speed requirements. A serial transmitter may consist of, for example, a serializer in one stage followed by a driver component in another stage. A common implementation of constructing a serializer can be made by combining partial stream bit streams, such as a half bit stream, through a multiplexer to achieve the full speed bit rate. However, the speed of the serial transmitter is affected by the implementation of the serializer and the driver component, since the speed of the serial transmitter is dominated by the circuit implementation and design choice.
The speed of the serial interface is dominated by two circuits that are tied together in their design choices. The output driver and the final 2:1 multiplexer dominate the speed limitations as all circuits prior to this node operate at half the data rate. The driver itself not only creates a speed bottleneck but also sets the load for the final mux stage. The final mux stage creates also a speed bottleneck in the physical layer, which may be more serious than the actual output driver because of the load set by the driver.
Previous implementations to remove and/or overcome the unwanted effects of the speed bottlenecks produced by the individual components in a serial transmitter focused on using a dynamic load as an output driving component. Such an implementation however, required the serial transmitter to be driven with a current mode pre-driver that necessitated the use of large input devices to drive a dynamic load. This requirement could be alleviated by driving the serial transmitter with a CMOS inverter, but implementing a CMOS multiplexer, for example, and buffering its output to drive a pre-driver creates its own undesirable speed bottleneck and inter-symbol interference (“ISI”).
Thus there remains a need in the art, for a high speed serial transmitter that can overcome the speed limitations of its individual components. There further remains a need in the art for an efficient, high speed current mode driver that can combine a driver with multiplexing functionality in a single stage while operating at lower power.